The present invention relates to a semiconductor device that a plurality of semiconductor chips are integrally structured and in particular to, facilitation of design for the semiconductor device.
A semiconductor device with a plurality of semiconductor chips being integrally structured therein is conventionally designed so that pads for the semiconductor chips are connected together by utilizing wire bonding connection or flip chip connection.
A conventional semiconductor device with a plurality of semiconductor chips being integrally structured therein will be described hereinafter.
FIG. 27 is a view showing the structure of a conventional semiconductor device with a plurality of semiconductor chips being integrally structured therein. FIG. 28 is a cross-sectional view taken along a line X-X shown in FIG. 27.
As shown in FIGS. 27 and 28, a semiconductor device 1000 comprises a semiconductor chip B, a semiconductor chip A which is adhered on the semiconductor chip B with an adhered portion being interposed therebetween and wires 11, 12, 13, 14, 15, 16, 21, 22, 23, 24, 25 and 26 extended from pads for the semiconductor chips A and B by wire bonding.
The wires 13, 15, 23 and 25 connect the pads for the chip A to the pad for the chip B. The wires 12, 14, 22 and 24 connect the pads for the chip A to electrodes outside the semiconductor device 1000 (e.g., lead frame, electrode pad for printed wiring board and the like). The wires 11, 16, 21 and 26 connect the pad for the chip B to external of the semiconductor device 1000.
There arise following various problems in designing and manufacturing the conventional semiconductor device 1000.
Firstly, as shown in FIG. 28, in accordance with the conventional semiconductor device 1000, a maximum distance h from the wire 12 or 22 to the upper surface of the semiconductor chip B is extremely long. Further, portions of the wires 12 and 22 that are not connected to pads are long. For this reason, the wires 12 and 22 are easily bent by an external stress. Consequently, when the wires are provided and then the semiconductor device 1000 is to be worked, the wires 12 and 22 and the wires 11 and 21 may be shorted. As a result, yield rates for products obtained by working the semiconductor device 1000 may be decreased.
Moreover, since the positions of the pads for the semiconductor chips A and B are fixed in the conventional semiconductor device 1000, a degree of freedom in wiring design is low.
In accordance with the conventional semiconductor device 1000, wires for connecting the semiconductor A to the semiconductor B (e.g., the wires 12 and 14) may have different lengths. Thus, such wires may have various delay values.
The semiconductor chip B does not have marks for fixing the semiconductor A thereon. Thus, when the conventional semiconductor device 1000 is manufactured, it is difficult to adhere the semiconductor chip A on the semiconductor chip B so that the semiconductor chip A is securely fixed on a predetermined position of the semiconductor chip B.
When the semiconductor chip A and other semiconductor chip with the same size as the semiconductor chip A are adhered on the semiconductor chip B, the semiconductor chip A may be mistaken for the other semiconductor chip.
The semiconductor chip A is provided with only pads for wire bonding. Thus, the semiconductor chip A is connected to the semiconductor chip B only by wire bonding.
In accordance with the conventional semiconductor device 1000, since the space between the semiconductor chips A and B is not shielded at a ground potential, EMI (Electro Magnetic Interference) may occur thereat.